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for free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. for small orders, phone 408-737-7600 ext. 3468. general description the max1637 synchronous, buck, switch-mode power- supply controller generates the cpu supply voltage in battery-powered systems. the max1637 is a stripped- down version of the max1636 in a smaller 16-pin qsop package. the max1637 is intended to be powered sep- arately from the battery by an external bias supply (typi- cally the +5v system supply) in applications where the battery exceeds 5.5v. the max1637 achieves excellent dc and ac output voltage accuracy. this device can operate from a low input voltage (3.15v) and delivers the excellent load-transient response needed by upcoming generations of dynamic-clock cpus. using synchronous rectification, the max1637 achieves up to 95% efficiency. efficiency is greater than 80% over a 1000:1 load-current range, which extends bat- tery life in system-suspend or standby mode. excellent dynamic response corrects output load transients caused by the latest dynamic-clock cpus within five 300khz clock cycles. powerful 1a on-board gate driv- ers ensure fast external n-channel mosfet switching. the max1637 features a logic-controlled and synchro- nizable, fixed-frequency, pulse-width-modulation (pwm) operating mode. this reduces noise and rf interference in sensitive mobile-communications and pen-entry applications. asserting the skip pin enables fixed-frequency mode, for lowest noise under all load conditions. for a stand-alone device that includes a +5v vl linear regulator and low-dropout capabilities, refer to the max1636 data sheet. ________________________applications notebook computers subnotebook computers handy-terminals, pdas ____________________________features ? ?% dc accuracy ? 0.1% (typ) dc load regulation ? adjustable switching frequency to 350khz ? idle mode pulse-skipping operation ? 1.10v to 5.5v adjustable output voltage ? 3.15v minimum ic supply voltage (at v cc pin) ? internal digital soft-start ? 1.1v ?% reference output ? 1? total shutdown current ? output overvoltage crowbar protection ? output undervoltage shutdown (foldback) ? tiny 16-pin qsop package max1637 miniature, low-voltage, precision step-down controller ________________________________________________________________ maxim integrated products 1 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 csh skip lx dh bst pgnd dl v gg v cc top view max1637 qsop csl fb shdn cc ref sync gnd __________________pin configuration __________typical operating circuit 19-1321; rev 1; 2/98 part MAX1637EEE -40? to +85? temp. range pin-package 16 qsop evaluation kit available ______________ordering information idle mode is a trademark of maxim integrated products. max1637 shdn gnd v batt v bias dl pgnd lx dh v cc v gg bst csh csl fb skip sync ref cc output
max1637 miniatur e, low-v oltage, pr ecision step-down contr oller 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (circuit of figure 1, v cc = v gg = 5v, sync = v cc , i ref = 0ma, t a = 0 c to +85 c , unless otherwise noted. typical values are at t a = +25 c.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. gnd to pgnd ............................................................. +2v to -2v lx, bst to gnd ...................................................... -0.3v to +36v bst, dh to lx ........................................................... -0.3v to +6v v cc , v gg , csl, csh, shdn to gnd ....................... -0.3v to +6v dl to gnd .................................................. -0.3v to (v gg + 0.3v) ref, skip , sync, cc to gnd ................... -0.3v to (v cc + 0.3v) ref output current ............................................................. 20ma ref short-circuit to gnd .............................................. indefinite operating temperature range ........................... -40 c to +85 c continuous power dissipation (t a = +70 c) qsop (derate 8.3mw/ c above +70 c) ...................... 667mw storage temperature range ............................. -65 c to +160 c junction temperature ...................................................... +150 c lead temperature (soldering, 10sec) ............................. +300 c sync = gnd sync = v cc fb tied to v out , 0mv < (csh - csl) < 80mv, includes line and load regulation v cc = 3.15v to 5.5v ref load = 0 a to 50 a v cc , v gg ref load = 0 a rising edge, hysteresis = 15mv rising edge, hysteresis = 15mv shdn = gnd, v cc = v gg csh - csl = 0mv to csh - csl = 100mv csh - csl v cc = 5v v cc = 3.3v shdn to full current limit, four levels v fb = v ref conditions 170 200 230 oscillator frequency khz 270 300 330 mv 3 ref line regulation mv 10 ref load regulation v 1.080 1.100 1.120 ref output voltage v 2.80 3.05 v gg undervoltage lockout threshold v 2.80 3.05 v cc undervoltage lockout threshold % 2 ac load regulation mv 20 30 40 idle-mode switchover threshold clocks 512 soft-start ramp time na -50 50 fb input current v 3.15 5.5 input voltage range a 0.5 3 shutdown supply current v 1.080 1.100 1.120 output voltage v ref 5.5 output adjustment range v v ref 3.6 units min typ max parameter csh > csl csh < csl 80 100 120 current-limit threshold mv -145 -100 -55 output not switching 1.5 2.5 power consumption mw 1 1.75 sync = gnd sync = v cc ns 200 sync input pulse width high % 93 96 89 92 maximum duty factor (note 1) khz 240 340 sync input frequency range ns 200 sync input rise/fall time ns 200 sync input pulse width low v cc = v gg = 5v v cc = v gg = 3.3v smps controller internal reference oscillator
max1637 miniatur e, low-v oltage, pr ecision step-down contr oller _______________________________________________________________________________________ 3 electrical characteristics (continued) (circuit of figure 1, v cc = v gg = 5v, sync = v cc , i ref = 0ma, t a = 0 c to +85 c , unless otherwise noted. typical values are at t a = +25 c.) electrical characteristics (circuit of figure 1, v cc = v gg = 5v, sync = v cc , i ref = 0ma, t a = -40 c to +85 c , unless otherwise noted.) (note 2) high or low, dh or dl dh or dl forced to 2v csh = csl = 5v, v cc = v gg = gnd, either csh or csl input fb to dl delay, 22mv overdrive, c gate = 2000pf fb, with respect to regulation point from shutdown or power-on-reset state pin at gnd or v cc shdn , skip , sync % of nominal output shdn , skip , sync conditions 7 gate driver on-resistance a 1 gate driver sink/source current a 10 current-sense input leakage current a -1 1 logic input bias current v 0.8 logic input voltage low v 2.4 logic input voltage high s 1.25 overvoltage fault propagation delay % 4 7 10 overvoltage trip threshold clocks 6144 output undervoltage lockout delay % 60 70 80 output undervoltage lockout threshold units min typ max parameter fb tied to v out , 0mv < (csh - csl) < 80mv, includes line and load regulation sync = gnd v cc , v gg sync = v cc rising edge, hysteresis = 15mv rising edge, hysteresis = 15mv v cc = 3.3v v cc = v gg = 3.3v, output not switching v cc = 5v v cc = v gg = 5v, output not switching csh > csl conditions khz 240 340 sync input frequency range ns 200 sync input rise/fall time ns 200 sync input pulse width low ns 200 sync input pulse width high khz 170 230 oscillator frequency 262 338 v 2.80 3.05 v gg undervoltage lockout threshold v 2.80 3.05 v cc undervoltage lockout threshold mw 1.75 power consumption mw 2.5 mv 70 130 current-limit threshold v 1.080 1.120 output voltage v 3.15 5.5 input voltage range v ref 3.6 output adjustment range v v ref 5.5 units min typ max parameter overvoltage protection inputs and outputs smps controller internal reference oscillator
0 10 5 15 20 0 3 4 1 2 5 6 8 7 9 supply current vs. load current max1637-07 load current (a) v cc + v gg supply current (ma) sync = high sync = low skip = low max1637 miniatur e, low-v oltage, pr ecision step-down contr oller 4 _______________________________________________________________________________________ electrical characteristics (continued) (circuit of figure 1, v cc = v gg = 5v, sync = v cc , i ref = 0ma, t a = -40 c to +85 c , unless otherwise noted.) (note 2) shdn , skip , sync shdn , skip , sync % of nominal output fb, with respect to regulation point conditions v 0.8 logic input voltage low v 2.4 logic input voltage high % 60 80 output undervoltage lockout threshold % 4.0 10 overvoltage trip threshold units min typ max parameter note 1: guaranteed by design, not production tested. note 2: specifications from -40 c to 0 c are guaranteed by design and not production tested. __________________________________________ t ypical operating characteristics (v out = 3.3v, t a = +25 c, unless otherwise noted.) 100 50 0.01 10 1 0.1 efficiency vs. load current (1.7v/7a circuit) 70 60 90 80 max1637-01 load current (a) efficiency (%) skip = low v batt = 7v v batt = 15v v batt = 22v 100 0 0.001 10 1 0.01 0.1 efficiency vs. load current (2.5v/3a circuit) 40 30 20 10 80 70 90 60 50 max1637-02 load current (a) efficiency (%) v batt = 15v skip = low v batt = 7v v batt = 22v 100 50 0.01 10 1 0.1 efficiency vs. load current (2.5v/2a circuit) 70 60 90 80 max1637-03 load current (a) efficiency (%) v batt = 7v skip = low v batt = 15v v batt = 22v 100 50 0.01 10 1 0.1 efficiency vs. load current (3.3v/3a circuit) 70 60 90 80 max1637-04 load current (a) efficiency (%) v batt = 5v v batt = 30v v batt = 15v skip = low 0 10 5 15 20 3.0 4.0 3.5 4.5 5.0 5.5 6.0 supply current vs. supply voltage max1637-06 supply voltage (v) v cc + v gg supply current (ma) i load = 1a v out = 3.3v skip = high skip = low overvoltage protection inputs and outputs
max1637 miniatur e, low-v oltage, pr ecision step-down contr oller _______________________________________________________________________________________ 5 10 -10 0.01 10 1 0.1 load regulation vs. load current -2 -6 -8 6 8 4 0 -4 2 max1637-08 load current (a) load regulation d v out (mv) 0 0.3 0.2 0.1 0.4 0.5 0.6 0 40 30 10 20 50 60 70 80 90 100 ref load-regulation error vs. ref load current max1637-09 ref load current ( m a) ref load regulation d v (mv) 900 0 0.01 10 1 0.1 dropout voltage vs. load current 300 200 100 700 800 600 400 500 max1637-10 load current (a) dropout voltage (mv) v out forced to 3.27v sync = v cc v out 20mv/div v lx inductor current 1a 0v 5v 0a switching waveforms (pwm mode) max1637-13 1 m s/div v out 50mv/div load current 0a 2a 4a load-transient response (3.3v/3a, pwm mode) max1637 toc11 100 m s/div v out 50mv/div 5a load current 0a 10a load-transient response (1.8v, pwm mode) max1637 toc12 100 m s/div v out 50mv/div v lx inductor current 1a 0v 5v 0a switching waveforms (pfm mode) max1637-14 20 m s/div v out = 1.7v 1 m s/div switching waveforms dropout operation max1637-15 v out 10mv/div v lx 2v/div inductor current 1a 0a v out forced to 3.27v sync = v cc ___________________________________ _ t ypical operating characteristics (continued) (v out = 3.3v, t a = +25 c, unless otherwise noted.)
max1637 miniatur e, low-v oltage, pr ecision step-down contr oller 6 _______________________________________________________________________________________ ___________________________________ _ t ypical operating characteristics (continued) (v out = 3.3v, t a = +25 c, unless otherwise noted.) 500 m s/div time exiting shutdown (v out = 3.3v, i load = 7a) max1637-16 v out 1v/div v shdn 5v/div v out 100mv/div v dl inductor current -5a 0a 0v 5v -10a overvoltage-protection waveforms (v in shorted to v out through a 0.5 w resistor) max1637-17 10 m s/div ______________________________________________________________ pin description pin high-side current-sense input csh 1 function name low-side current-sense input csl 2 compensation pin. connect a small capacitor to gnd to set the integration time constant. cc 4 feedback input. connect to center of resistor divider. fb 3 shutdown control input. turns off entire ic. when low, reduces supply current below 0.5 a (typ). drive with logic input or connect to rc network between gnd and v cc for automatic start-up. shdn 6 analog ground gnd 8 oscillator frequency select and synchronization input. tie to v cc for 300khz operation; tie to gnd for 200khz operation. sync 7 1.100v reference output. capable of sourcing 50 a for external loads. bypass with 0.22 f minimum. ref 5 gate-drive and boost-circuit power supply. can be driven from a supply other than v cc . if the same supply is used by both v cc and v gg , isolate v cc from v gg with a 20 resistor. bypass to pgnd with a 4.7 f capacitor. v gg current = (q g1 + q g2 ) x f, where q g is the mosfet gate charge at v gs = v gg . v gg 10 power ground pgnd 12 low-side gate-driver output dl 11 high-side gate-driver output dh 14 low-noise mode control. forces fixed-frequency pwm operation when high. skip 16 inductor connection lx 15 boost capacitor connection bst 13 main analog supply-voltage input to the chip. v cc powers the pwm controller, logic, and reference. input range is 3.15v to 5.5v. bypass to gnd with a 0.1 f capacitor close to the pin. v cc 9
max1637 miniatur e, low-v oltage, pr ecision step-down contr oller _______________________________________________________________________________________ 7 max1637 0.1 m f v bias +5v nominal 0.1 m f 1 m f 470pf c1 q1 cmpsh-3 q2 c2 l1 * r1 r2 r3 output 4.7 m f *see rectifier clamp diode section **optional rc network for power-on-reset dl pgnd lx dh bst v gg v cc v batt csh csl fb 1m ** on/off cc gnd shdn ref sync 20 w skip 0.01 m f ** figure 1. standard application circuit ______ standar d application cir cuit the basic max1637 buck converter (figure 1) is easily adapted to meet a wide range of applications where a 5v or lower supply is available. the components listed in table 1 represent a good set of trade-offs among cost, size, and efficiency, while staying within the worst- case specification limits for stress-related parameters such as capacitor ripple current. do not change the cir - cuit? switching frequency without first recalculating component values (particularly inductance value at maximum battery voltage). the power schottky diode across the synchronous rec - tifier is optional because the mosfets chosen incorpo - rate a high-speed silicon diode. however, installing the schottky will generally improve efficiency by about 1%. if used, the schottky diode dc current must be rated to at least one-third of the maximum load current. _______________ detailed description the max1637 is a bicmos, switch-mode power-supply (smps) controller designed primarily for buck-topology regulators in battery-powered applications where high efficiency and low quiescent supply current are critical. light-load efficiency is enhanced by automatic idle- mode operation? variable-frequency, pulse-skipping mode that reduces transition and gate-charge losses. the step-down, power-switching circuit consists of two n-channel mosfets, a rectifier, and an lc output filter. output voltage for this device is the average ac volt - age at the switching node, which is regulated by changing the duty cycle of the mosfet switches. the gate-drive signal to the high-side n-channel mosfet, which must exceed the battery voltage, is provided by a flying-capacitor boost circuit that uses a 100nf capacitor between bst and lx. figure 2 shows the major circuit blocks.
load current max1637 miniatur e, low-v oltage, pr ecision step-down contr oller 8 _______________________________________________________________________________________ table 1. component selection for standard applications table 2. component suppliers 2.5v output voltage range 300khz frequency chipset supply application 1/2 si4902dy or 1/2 mmdf3no3hd q1 high-side mosfet 7v to 22v input voltage range (619) 661-6835 (81) 7-2070-1174 sanyo tokin (408) 432-8020 (847) 390-4373 (1) 408-434-0375 (1) 847-390-4428 tdk sprague (847) 956-0666 (81) 3-3607-5144 sumida (603) 224-1961 (714) 373-7939 (408) 988-8000 (1) 714-373-7183 panasonic (1) 603-224-1430 (1) 408-970-3950 siliconix (602) 303-5454 (1) 602-994-6430 motorola (847) 696-2000 company matsuo (714) 969-2491 (1) 714-960-6492 usa phone factory fax (country code) (1) 847-696-9278 marcon/united chemi-con company central semiconductor fairchild (408) 721-2181 (1) 408-721-1635 (512) 992-7900 (1) 512-992-3377 irc dale (310) 322-3331 (1) 310-322-3332 international rectifier (ir) (605) 668-4131 (847) 639-6400 (561) 241-7876 (1) 847-639-1469 coilcraft (1) 605-665-1627 (1) 561-241-9339 coiltronics usa phone (516) 435-1110 (803) 946-0690 factory fax (country code) (1) 516-435-1824 (1) 803-626-3123 avx 2.5v 300khz chipset supply international rectifier irf7403 or siliconix si4412 7v to 22v 3.3v 1.7v 300khz 300khz general purpose cpu core international rectifier irf7403 or siliconix si4412 fairchild fds9412 or international rectifier irf7403 4.75v to 30v 7v to 22v 10 f, 25v ceramic tokin c34y5u1e106z or marcon/united chemicon thcr40e1e106zt 10 f, 25v ceramic tokin c34y5u1e106z or marcon/united chemicon thcr40e1e106zt c1 input capacitor 0.020 , 1% (2010) dale wsl-2010-r020f 0.033 , 1% (2010) dale wsl-2010-r033f r1 resistor 470 f, 6.3v tantalum kemet t510x477(1)006as or 470 f, 4v tantalum sprague 594d477x0004r2t 220 f, 6.3v tantalum sprague 595d227x96r3c2 c2 output capacitor 10 h sumida cdrh125-100 10 h coilcraft do3316p-103 or coiltronics up2-100 l1 inductor international rectifier irf7413 or siliconix si4410dy 1/2 si4902dy or 1/2 mmdf3no3hd q2 low-side mosfet 10 f, 30v sanyo os-con 4 x 10 f, 25v ceramic tokin c34y5u1e106z or marcon/united chemicon thcr40e1e106zt 0.020 , 1% (2010) dale wsl-2010-r020f 0.010 , 1% (2512) dale wsl-2512-r010f 470 f, 6.3v tantalum kemet t510x477(1)006as or 470 f, 4v tantalum sprague 594d477x0004r2t 3 x 470 f, 6.3v tantalum kemet t510x477(1)006as or 470 f, 4v tantalum sprague 594d477x0004r2t 10 h sumida cdrh125-100 2.2 h panasonic p1f2r0hl or coiltronics up4-2r2 or coilcraft do5022p-222hc international rectifier irf7413 or siliconix si4410dy fairchild fds6680 or siliconix si4420dy component 3a (ev kit) 2a 3a 7a (ev kit) load current
max1637 miniatur e, low-v oltage, pr ecision step-down contr oller _______________________________________________________________________________________ 9 the pulse-width-modulation (pwm) controller consists of a multi-input pwm comparator, high-side and low- side gate drivers, and logic. it uses a 200khz/300khz synchronizable oscillator. the max1637 contains fault- protection circuits that monitor the pwm output for undervoltage and overvoltage. it includes a 1.100v pre - cision reference. the circuit blocks are powered from an internal ic power rail that receives power from v cc . v gg provides direct power to the synchronous-switch gate driver, but provides indirect power to the high- side-switch gate driver via an external diode-capacitor boost circuit. ref ic power 200khz to 300khz osc pwm logic 3.15v to 5.5v v batt v out ref shdn sync v cc dl pgnd lx dh bst v gg skip csh csl fb cc ref gnd v ref +7% v ref -30% + 60khz lp filter shutdown control 1.1v ref. error integrator + - + - + - + - + max1637 gm overvoltage fault under- voltage fault off slope compensation v bias figure 2. functional diagram
max1637 miniatur e, low-v oltage, pr ecision step-down contr oller 10 ______________________________________________________________________________________ pwm controller block the heart of the current-mode pwm controller is a multi-inp ut, open-loop comparator that sums four sig - nals: the output voltage error signal with respect to the reference voltage, the current-sense signal, the integrated voltage-feedback signal, and the slope- compensation ramp (figure 3). the pwm controller is a direct-summing type, lacking a traditional error amplifier and the phase shift associated with it. this direct-summing configuration approaches ideal cycle-by-cycle control over the output voltage. shoot- through control r q 30mv r q level shift 1x gm 2x osc level shift ref current limit synchronous rectifier control shdn ck -100mv csh csl cc ref fb bst dh lx v gg dl pgnd s s slope compensation skip counter dac soft-start figure 3. pwm controller functional diagram
max1637 miniatur e, low-v oltage, pr ecision step-down contr oller ______________________________________________________________________________________ 11 idle mode when skip is low, idle-mode circuitry automatically optimizes efficiency throughout the load-current range. idle mode dramatically improves light-load efficiency by reducing the effective frequency, subsequently reducing switching losses. it forces the peak inductor current to ramp to 30% of the full current limit, deliver - ing extra energy to the output and allowing subsequent cycles to be skipped. idle mode transitions seamlessly to fixed-frequency pwm operation as load current increases (table 3). fixed-frequency mode when skip is high, the controller always operates in fixed-frequency pwm mode for lowest noise. each pulse from the oscillator sets the main pwm latch that turns on the high-side switch for a period determined by the duty factor (approximately v out / v in ). as the high-side switch turns off, the synchronous rectifier latch is set; 60ns later, the low-side switch turns on. the low-side switch stays on until the beginning of the next clock cycle. in pwm mode, the controller operates as a fixed-fre - quency, current-mode controller in which the duty fac - tor is set by the input/output voltage ratio. pwm mode ( skip = high) forces two changes on the pwm con - troller. first, it disables the minimum-current compara - tor, ensuring fixed-frequency operation. second, it changes the detection threshold for reverse-current limit from 0mv to -100mv, allowing the inductor current to reverse at light loads. this results in fixed-frequency operation and continuous inductor-current flow. pwm mode eliminates discontinuous-mode inductor ringing and improves cross-regulation of transformer-coupled, multiple-output supplies. the current-mode feedback system regulates the peak inductor-current value as a function of the output volt - age error signal. in continuous-conduction mode, the average inductor current is nearly the same as the peak current, so the circuit acts as a switch-mode transconductance amplifier. this pushes the second output lc filter pole, normally found in a duty-factor- controlled (voltage-mode) pwm, to a higher frequency. to preserve inner-loop stability and eliminate regenera - tive inductor-current ?taircasing,?a slope-compensa - tion ramp is summed into the main pwm comparator to make the apparent duty factor less than 50%. the relative gains of the voltage-sense and current- sense inputs are weighted by the values of the current sources that bias four differential input stages in the main pwm comparator (figure 4). the voltage sense into the pwm has been conditioned by an integrated component of the feedback voltage, yielding excellent dc output voltage accuracy. see the output voltage accuracy section for details. constant frequency pwm, continuous inductor current heavy low constant frequency pwm, continuous inductor current heavy high constant frequency pwm, continuous inductor current light high skip pulse-skipping, discontin - uous inductor current light low description load current table 3. skip pwm table pwm pwm pwm idle mode fb ref csh csl cc slope compensation v cc i2 r1 r2 to pwm logic output driver uncompensated high-speed level translator and buffer i1 i3 i4 v bias figure 4. main pwm comparator functional diagram
max1637 miniatur e, low-v oltage, pr ecision step-down contr oller 12 ______________________________________________________________________________________ ref, v cc , and v gg supplies the 1.100v reference (ref) is accurate to 2% over temperature, making ref useful as a precision system reference. bypass ref to gnd with a 0.22 f (min) capacitor. ref can supply up to 50 a for external loads. loading ref reduces the main output voltage slightly because of the reference load-regulation error. the max1637 has two independent supply pins, v cc and v gg . v cc powers the sensitive analog circuitry of the smps, while v gg powers the high-current mosfet drivers. no protection diodes or sequencing require - ments exist between the two supplies. isolate v gg from v cc with a 20 resistor if they are powered from the same supply. bypass v cc to gnd with a 0.1 f capaci - tor located directly adjacent to the pin. use only small- signal diodes for the boost circuit (10ma to 100ma schottky or 1n4148 diodes are preferred), and bypass v gg to pgnd with a 4.7 f capacitor directly at the package pins. the v cc and v gg input range is 3.15v to 5.5v. high-side boost gate drive (bst) gate-drive voltage for the high-side n-channel switch is generated by a flying-capacitor boost circuit (figure 2). the capacitor between bst and lx is alternately charged from the v gg supply and placed parallel to the high-side mosfet? gate-source terminals. on start-up, the synchronous rectifier (low-side mosfet) forces lx to 0v and charges the boost capacitor to v gg . on the second half-cycle, the smps turns on the high-side mosfet by closing an internal switch between bst and dh. this provides the neces - sary enhancement voltage to turn on the high-side switch, an action that boosts the gate-drive signal above the battery voltage. ringing at the high-side mosfet gate (dh) in discon - tinuous-conduction mode (light loads) is a natural oper - ating condition. it is caused by residual energy in the tank circuit, formed by the inductor and stray capaci - tance at the switching node, lx. the gate-drive nega - tive rail is referred to lx, so any ringing there is directly coupled to the gate-drive output. synchronous-rectifier driver (dl) synchronous rectification reduces conduction losses in the rectifier by shunting the normal schottky catch diode with a low-resistance mosfet switch. also, the synchronous rectifier ensures proper start-up of the boost gate-driver circuit. if the synchronous power mosfet is omitted for cost or other reasons, replace it with a small-signal mosfet, such as a 2n7002. if the circuit is operating in continuous-conduction mode, the dl drive waveform is simply the complement of the dh high-side-drive waveform (with controlled dead time to prevent cross-conduction or ?hoot- through?. in discontinuous (light-load) mode, the syn - chronous switch is turned off as the inductor current falls through zero. shutdown mode and power-on reset shdn is a logic input with a threshold of about 1.5v that, when held low, places the ic in its 0.5 a shut - down mode. the max1637 has no power-on-reset cir - cuitry, and the state of the device is not known on initial power-up. in applications that use logic to drive shdn , it may be necessary to toggle shdn to initialize the part once v cc is stable. in applications that require automatic start-up, drive shdn through an external rc network (figure 5). the network will hold shdn low until v cc stabilizes. typical values for r and c are 1m and 0.01 f. for slow-rising v cc , use a larger capacitor. when cycling v cc , v cc must stay low long enough to discharge the 0.01 f capacitor, otherwise the circuit may not start. a diode may be added in parallel with the resistor to speed up the discharge. current-limiting and current- sense inputs (csh and csl) the current-limit circuit resets the main pwm latch and turns off the high-side mosfet switch whenever the voltage difference between csh and csl exceeds 100mv. this limiting is effective for both current flow directions, putting the threshold limit at 100mv. the tolerance on the positive current limit is 20%, so the external low-value sense resistor (r1) must be sized for 80mv / i peak , where i peak is the peak inductor current required to support the full load current. components must be designed to withstand continuous current stresses of 120mv / r1. max1637 shdn r = 1m w c = 0.01 m f v in v gg c r v cc figure 5. power-on reset rc network for automatic start-up
max1637 miniatur e, low-v oltage, pr ecision step-down contr oller ______________________________________________________________________________________ 13 for prototyping or for very high-current applications, it may be useful to wire the current-sense inputs with a twisted pair rather than pc traces (two pieces of wrapped wire twisted together are sufficient). this reduces the noise picked up at csh and csl, which can cause unstable switching and reduced output current. oscillator frequency and synchronization (sync) the sync input controls the oscillator frequency as fol - lows: low selects 200khz, high selects 300khz. sync can also be used to synchronize with an external 5v cmos or ttl clock generator. it has a guaranteed 240khz to 340khz capture range. a high-to-low transi - tion on sync initiates a new cycle. operation at 300khz optimizes the application circuit for component size and cost. operation at 200khz increases efficiency, reduces dropout, and improves load-transient response at low input-output voltage dif - ferences (see the low-voltage operation section). output voltage accuracy (cc) output voltage error is guaranteed to be within 2% over all conditions of line, load, and temperature. the max1637? dc load regulation is typically better than 0.1%, due to its integrator amplifier. the device opti - mizes transient response by providing a feedback sig - nal with a direct path from the output to the main summing pwm comparator. the integrated feedback signal from the cc transconductance amplifier is also summed into the pwm comparator, with the gain weighted so that the signal has only enough gain to correct the dc inaccuracies. the integrator? response time is determined by the time constant set by the capacitor placed on the cc pin. the time constant should neither be so fast that the integrator responds to the normal v out ripple, nor too slow to negate the inte - grator? effect. a 470pf to 1500pf cc capacitor is suf - ficient for 200khz to 300khz frequencies. figure 6 shows the output voltage response to a 0a to 3a load transient with and without the integrator. with the integrator, the output voltage returns to within 0.1% of its no-load value with only a small ac excursion. without the integrator, load regulation is degraded (figure 6b). asymmetrical clamping at the integrator output prevents worsening of load transients during pulse-skipping mode. output undervoltage lockout the output undervoltage-lockout circuit protects against heavy overloads and short-circuits at the main smps output. this scheme employs a timer rather than a foldback current limit. the smps has an undervolt - age-protection circuit, which is activated 6144 clock cycles after the smps is enabled. if the smps output is under 70% of the nominal value, it is latched off and does not restart until shdn is toggled. applications that use the recommended rc power-on-reset circuit will also clear the fault condition when v cc falls below 0.5v (typical). note that undervoltage protection can 0 2 4 -50 50 i out (a) v out (mv) (100 m s/div) cc = 470pf v out = 3.3v integrator active figure 6a. load-transient response with integrator active 0 2 4 -50 50 i out (a) v out (mv) (100 m s/div) cc = ref v out = 3.3v integrator deactivated figure 6b. load-transient response with integrator deactivated
max1637 miniatur e, low-v oltage, pr ecision step-down contr oller 14 ______________________________________________________________________________________ make prototype troubleshooting difficult since only 20ms or 30ms elapse before the smps is latched off. the overvoltage crowbar protection is disabled in out - put undervoltage mode. output overvoltage protection the overvoltage crowbar-protection circuit is intended to blow a fuse in series with the battery if the main smps output rises significantly higher than its standard level (table 4). in normal operation, the output is com - pared to the internal precision reference voltage. if the output goes 7% above nominal, the synchronous-recti - fier mosfet turns on 100% (the high-side mosfet is simultaneously forced off) in order to draw massive amounts of battery current to blow the fuse. this safety feature does not protect the system against a failure of the controller ic itself, but is intended primarily to guard against a short across the high-side mosfet. a crow - bar event is latched and can only be reset by a rising edge on shdn (or by removal of the v cc supply volt - age). the overvoltage-detection decision is made rela - tive to the regulation point. internal digital soft-start circuit soft-start allows a gradual increase of the internal cur - rent-limit level at start-up to reduce input surge cur - rents. the smps contains an internal digital soft-start circuit controlled by a counter, a digital-to-analog con - verter (dac), and a current-limit comparator. in shut - down, the soft-start counter is reset to zero. when the smps is enabled, its counter starts counting oscillator pulses, and the dac begins incrementing the compari - son voltage applied to the current-limit comparator. the dac output increases from 0mv to 100mv in five equal steps as the count increases to 512 clocks. as a result, the main output capacitor charges up relatively slowly. the exact time of the output rise depends on output capacitance and load current, but it is typically 1ms with a 300khz oscillator. setting the output voltage the output voltage is set via a resistor divider connect - ed to fb (figure 1). calculate the output voltage with the following formula: v out = v ref (1 + r2 / r3) where v ref = 1.1v nominal. recommended normal values for r3 range from 5k to 100k . to achieve a 1.1v nominal output, connect fb directly to csl. remote output voltage sensing is pos - sible by using the top of the external resistor divider as the remote sense point. __________________ design pr ocedur e the standard application circuit (figure 1) contains a ready-to-use solution for common application needs. use the following design procedure to optimize the basic schematic for different voltage or current require - ments. but before beginning a design, firmly establish the following: maximum input (battery) voltage, v in(max) . this value should include the worst-case conditions, such as no-load operation when a battery charger or ac adapter is connected but no battery is installed. v in(max) must not exceed 30v. minimum input (battery) voltage, v in(min) . this value should be taken at full load under the lowest battery conditions. if the minimum input-output difference is less than 1.5v, the filter capacitance required to maintain good ac load regulation increases (see low-voltage operation section). table 4. operating modes all circuit blocks off low shutdown ref = off, dl = low high output undervoltage lockout ref = off, dl = high high overvoltage (crowbar) v out below 70% of nominal after 20ms to 30ms timeout expires v out greater than 7% above regulation point v out in regulation conditions mode all circuit blocks active high run status shdn lowest current consumption rising edge on shdn exits uvlo rising edge on shdn exits crowbar normal operation notes
max1637 miniatur e, low-v oltage, pr ecision step-down contr oller ______________________________________________________________________________________ 15 inductor value the exact inductor value is not critical and can be freely adjusted to allow trade-offs among size, cost, and efficiency. lower inductor values minimize size and cost, but reduce efficiency due to higher peak- current levels. the smallest inductor value is obtained by lowering the inductance until the circuit operates at the border between continuous and discontinuous mode. further reducing the inductor value below this crossover point results in discontinuous-conduction operation, even at full load. this helps lower output filter capacitance requirements, but efficiency suffers under these conditions, due to high i 2 r losses. on the other hand, higher inductor values produce greater efficien - cy, but also result in resistive losses due to extra wire turns? consequence that eventually overshadows the benefits gained from lower peak current levels. high inductor values can also affect load-transient response (see the v sag equation in the low-voltage operation section). the equations in this section are for continu - ous-conduction operation. three key inductor parameters must be specified: inductance value (l), peak current (i peak ), and dc resistance (r dc ). the following equation includes a constant, lir, which is the ratio of inductor peak-to- peak ac current to dc load current. a higher lir value allows lower inductance, but results in higher losses and ripple. a good compromise is a 30% ripple-current to load-current ratio (lir = 0.3), which corresponds to a peak inductor current 1.15 times higher than the dc load current. l = v out (v in(max) - v out ) / (v in(min) x | x i out x lir) where | = switching frequency (normally 200khz or 300khz), and i out = maximum dc load current. the peak current can be calculated as follows: i peak = i load + [v out (v in(max) - v out ) / (2 x | x l x v in(max) )] the inductor? dc resistance should be low enough that r dc x i peak < 100mv, as it is a key parameter for efficiency performance. if a standard, off-the-shelf inductor is not available, choose a core with an li 2 rat - ing greater than l x ipeak 2 and wind it with the largest diameter wire that fits the winding area. for 300khz applications, ferrite-core material is strongly preferred; for 200khz applications, kool-mu (aluminum alloy) or even powdered iron is acceptable. if light-load efficien - cy is unimportant (in desktop pc applications, for example), then low-permeability iron-powder cores can be acceptable, even at 300khz. for high-current appli - cations, shielded-core geometries (such as toroidal or pot core) help keep noise, emi, and switching- waveform jitter low. current-sense resistor value the current-sense resistor value is calculated accord - ing to the worst-case, low-current limit threshold volt - age (from the electrical characteristics ) and the peak inductor current: r sense = 80mv / i peak use i peak from the second equation in the inductor value section. use the calculated value of r sense to size the mosfet switches and specify inductor satura - tion-current ratings according to the worst-case high- current-limit threshold voltage: i peak = 120mv / r sense low-inductance resistors, such as surface-mount metal film, are recommended. input capacitor value connect low-esr bulk capacitors directly to the drain on the high-side mosfet. the bulk input filter capaci - tor is usually selected according to input ripple current requirements and voltage rating, rather than capacitor value. electrolytic capacitors with low enough equiva - lent series resistance (esr) to meet the ripple-current requirement invariably have sufficient capacitance val - ues. aluminum electrolytic capacitors, such as sanyo os-con or nichicon pl, are superior to tantalum types, which risk power-up surge-current failure, espe - cially when connecting to robust ac adapters or low- impedance batteries. rms input ripple current (i rms ) is determined by the input voltage and load current, with the worst case occurring at v in = 2 x v out . therefore, when v in is 2 x v out : i rms = i load / 2 v cc and v gg should be isolated from each other with a 20 resistor and bypassed to ground independently. place a 0.1 f capacitor between v cc and gnd, as close to the supply pin as possible. a 4.7 f capacitor is recommended between v gg and pgnd. output filter capacitor value the output filter capacitor values are generally deter - mined by the esr and voltage-rating requirements, rather than by actual capacitance requirements for loop stability. in other words, the low-esr electrolytic capac - itor that meets the esr requirement usually has more output capacitance than is required for ac stability. kool-mu is a trademark of magnetics, inc.
max1637 miniatur e, low-v oltage, pr ecision step-down contr oller 16 ______________________________________________________________________________________ use only specialized low-esr capacitors intended for switching-regulator applications, such as avx tps, sprague 595d, sanyo os - con, or nichicon pl series. to ensure stability, the capacitor must meet both mini - mum capacitance and maximum esr values as given in the following equations: c out > v ref (1 + v out / v in(min) ) / v out x r sense x | r esr < r sense x v out / v ref where r esr can be multiplied by 1.5, as discussed below. these equations are worst case, with 45 degrees of phase margin to ensure jitter-free, fixed-frequency operation, and provide a nicely damped output response for zero to full-load step changes. some cost- conscious designers may wish to bend these rules with less-expensive capacitors, particularly if the load lacks large step changes. this practice is tolerable if some bench testing over temperature is done to verify acceptable noise and transient response. no well-defined boundary exists between stable and unstable operation. as phase margin is reduced, the first symptom is timing jitter, which shows up as blurred edges in the switching waveforms where the scope does not quite sync up. technically speaking, this jitter (usually harmless) is unstable operation since the duty factor varies slightly. as capacitors with higher esrs are used, the jitter becomes more pronounced, and the load-transient output voltage waveform starts looking ragged at the edges. eventually, the load-transient waveform has enough ringing on it that the peak noise levels exceed the allowable output voltage tolerance. note that even with zero phase margin and gross instability, the output voltage seldom declines beyond i peak x r esr (under constant loads). designers of rf communicators or other noise-sensi - tive analog equipment should be conservative and stay within the guidelines. designers of notebook computers and similar commercial-temperature-range digital sys - tems can multiply the r esr value by a factor of 1.5 without affecting stability or transient response. the output voltage ripple, which is usually dominated by the filter capacitor? esr, can be approximated as i ripple x r esr . there is also a capacitive term, so the full equation for ripple in continuous-conduction mode is v ripple(p-p) = i ripple x [r esr + 1 / (2 p| x c out )]. in idle mode, the inductor current becomes discontinuous, with high peaks and widely spaced pulses, so the noise can actually be higher at light load (compared to full load). in idle mode, calculate the output ripple as follows: v ripple(p-p) = (0.02 x r esr / r sense ) + [0.0003 x l x (1 / v out + 1 / (v in - v out )) / r sense 2 x c f ] selecting other components mosfet switches the high-current n-channel mosfets must be logic- level types with guaranteed on-resistance specifications at v gs = 4.5v. lower gate-threshold specifications are better (i.e., 2v max rather than 3v max). drain-source breakdown voltage ratings must at least equal the maxi - mum input voltage, preferably with a 20% margin. the best mosfets have the lowest on-resistance per nanocoulomb of gate charge. multiplying r ds(on) by qg provides a good figure of merit for comparing vari - ous mosfets. newer mosfet process technologies with dense cell structures generally perform best. the internal gate drivers tolerate >100nc total gate charge, but 70nc is a more practical upper limit to maintain best switching times. in high-current applications, mosfet package power dissipation often becomes a dominant design factor. i 2 r power losses are the greatest heat contributor for both high-side and low-side mosfets. i 2 r losses are distributed between q1 and q2 according to duty fac - tor, as shown in the following equations. generally, switching losses affect only the upper mosfet since the schottky rectifier usually clamps the switching node before the synchronous rectifier turns on. gate-charge losses are dissipated by the driver and do not heat the mosfet. calculate the temperature rise according to package thermal-resistance specifications to ensure that both mosfets are within their maximum junction temperature at high ambient temperature. the worst- case dissipation for the high-side mosfet occurs at both extremes of input voltage, and the worst-case dis - sipation for the low-side mosfet occurs at maximum input voltage. duty = (v out + v q2 ) / (v in - v q1 ) p d (upper fet) = i load 2 x r ds(on) x duty + v in x i load x | x [(v in x c rss ) / i gate + 20ns] p d (lower fet) = i load 2 x r ds(on) x (1 - duty) where v q = the on-state voltage drop (i load x r ds(on) ), c rss = the mosfet reverse transfer capaci - tance, i gate = the dh driver peak output current capa - bility (1a typ), and the dh driver inherent rise/fall time is 20ns. the max1637? output undervoltage shutdown function protects the synchronous rectifier under output short-circuit conditions. to reduce emi, add a 0.1 f ceramic capacitor from the high-side switch drain to the low-side switch source.
rectifier clamp diode the rectifier is a clamp across the low-side mosfet that catches the negative inductor swing during the 60ns dead time between turning one mosfet off and turning each low-side mosfet on. the latest genera - tions of mosfets incorporate a high-speed silicon body diode, which serves as an adequate clamp diode if efficiency is not of primary importance. a schottky diode can be placed in parallel with the body diode to reduce the forward voltage drop, typically improving efficiency 1% to 2%. use a diode with a dc current rat - ing equal to one-third of the load current; for example, use an mbr0530 (500ma-rated) type for loads up to 1.5a, a 1n5819 type for loads up to 3a, or a 1n5822 type for loads up to 10a. the rectifier? rated reverse- breakdown voltage must be at least equal to the maxi - mum input voltage, preferably with a 20% margin. boost-supply diode d2 a signal diode such as a 1n4148 works well in most applications. do not use large power diodes, such as 1n5817 or 1n4001. low-voltage operation low input voltages and low input-output differential volt - ages each require extra care in their design. low v in - v out differentials can cause the output voltage to sag when the load current changes abruptly. the sag? amplitude is a function of inductor value and maximum duty factor (d max , an electrical characteristics parame - ter, 93% guaranteed over temperature at f = 200khz) as follows: v sag = [(i step ) 2 x l] / [2c f x (v in(min) x d max - v out )] table 5 is a low-voltage troubleshooting guide. the cure for low-voltage sag is to increase the output capacitor? value. for example, at v in = 5.5v, v out = 5v, l = 10 h, | = 200khz, and i step = 3a, a total capacitance of 660 f keeps the sag below 200mv. note that only the capacitance requirement increases; the esr requirements do not change. therefore, the added capacitance can be supplied by a low-cost bulk capacitor in parallel with the normal low-esr capacitor. __________ applications infor mation heavy-load efficiency considerations the major efficiency-loss mechanisms under loads are as follows, in the usual order of importance: p(i 2 r) = i 2 r losses p(tran) = transition losses p(gate) = gate-charge losses p(diode) = diode-conduction losses p(cap) = capacitor esr losses p(ic) = losses due to the ic? operating supply current inductor core losses are fairly low at heavy loads because the inductor? ac current component is small. therefore, these losses are not considered in this analysis. ferrite cores are preferred, especially at 300khz, but powdered cores, such as kool-mu, can also work well. efficiency = p out / p in x 100% = p out / (p out + p total ) x 100% p total = p(i 2 r) + p(tran) + p(gate) + p(diode) + p(cap) + p(ic) p = (i 2 r) = i load 2 x (r dc + r ds(on) +r sense ) where r dc is the dc resistance of the coil, r ds(on) is the mosfet on-resistance, and r sense is the current- sense resistor value. the r ds(on) term assumes iden - tical mosfets for the high-side and low-side switches because they time-share the inductor current. if the mosfets are not identical, their l osses can be estimat - ed by averaging the losses according to duty factor. pd(tran) = transition loss = v in x i load x | x [(v in c rss / i gate ) + 20ns] where c rss is the reverse transfer capacitance of the high-side mosfet (a data sheet parameter), i gate is the dh gate-driver peak output current (1.5a typ), and the rise/fall time of the dh driver is typically 20ns. max1637 miniatur e, low-v oltage, pr ecision step-down contr oller ______________________________________________________________________________________ 17 table 5. low-voltage troubleshooting guide low v in -v out differential, under 1v low v in -v out differential, under 1.5v dropout voltage is too high sag or droop in v out under step-load change symptom maximum duty-cycle limits exceeded limited inductor-current slew rate per cycle root cause condition reduce operation to 200khz. reduce mosfet on-resistance and coil dc resistance. increase bulk output capacitance per formula (see low-voltage operation section). reduce inductor value. solution
max1637 p(gate) = q g x | x v gg where q g is the sum of the gate-charge values for low- side and high-side switches. for matched mosfets, q g is twice the data-sheet value of an individual mosfet. efficiency can usually be optimized by con - necting v gg to the most efficient 5v source, such as the system +5v supply. p(diode) = diode conduction losses = i load x v fwd x t d x | where t d is the diode conduction time (120ns typ), and v fwd is the diode forward voltage. this power is dissi - pated in the mosfet body diode if no external schottky diode is used. p(cap) = input capacitor esr loss = i rms 2 x r esr where i rms is the input ripple current as calculated in the input capacitor value section. light-load efficiency considerations under light loads, the pwm operates in discontinuous mode. the inductor current discharges to zero at some point during the charging cycle. this makes the induc - tor current? ac component high compared to the load current, which increases core losses and i 2 r losses in the input-output filter capacitors. for best light-load effi - ciency, use mosfets with moderate gate-charge lev - els and use ferrite mpp or other low-loss core material. avoid powdered-iron cores; even kool-mu (aluminum alloy) is not as desirable as ferrite. low-noise operation noise-sensitive applications such as hi-fidelity multi- media-equipped systems, cellular phones, rf commu - nicating computers, and electromagnetic pen-entry systems should operate the controller in pwm mode ( skip = high). this mode forces a constant switching frequency, reducing interference due to switching noise by concentrating the radiated em fields at a known frequency outside the system audio or if bands. choose an oscillator frequency for which switching- frequency harmonics do not overlap a sensitive fre - quency band. if necessary, synchronize the oscillator to a tight-tolerance external clock generator. powering from a single low-voltage supply the circuit of figure 7 is powered from a single 3.3v to 5.5v source and delivers 4a at 2.5v. at input voltages of 3.15v, this circuit typically achieves efficiencies of 90% at 3.5a load currents. when using a single supply to power both v batt and v bias , be sure that it does not exceed the 5.5v rating (6v absolute maximum) for v gg and v cc . also, heavy current surges from the input may cause transient dips on v cc . to prevent this, the decoupling capacitor on v cc may need to be increased to 2 f or greater. this circuit uses low- threshold (specified at v gs = 2.7v) irf7401 mosfets which allow a typical startup of 3.15v at above 4a. low input voltages demand the use of larger input capaci - tors. sanyo os-cons are recommended for their high capacity and low esr. pc board layout considerations good pc board layout is required to achieve specified noise, efficiency, and stable performance. the pc board layout artist must be given explicit instructions, preferably a pencil sketch showing the placement of power-switching components and high-current routing. see the pc board layout in the max1637 evaluation kit manual for examples. a ground plane is essential for optimum performance. in most applications, the circuit will be located on a multi-layer board, and full use of the four or more copper layers is recommended. use the top layer for high-current connections, the bottom layer for quiet connections (ref, cc, gnd), and the inner layers for an uninterrupted ground plane. use the following step-by-step guide: 1) place the high-power components (c1, c2, q1, q2, d1, l1, and r1) first, with their grounds adjacent. minimize current-sense resistor trace lengths and ensure accurate current sensing with kelvin con- nections (figure 8). minimize ground trace lengths in the high-current paths. minimize other trace lengths in the high-current paths. use >5mm-wide traces. cin to high-side mosfet drain: 10mm max length rectifier diode cathode to low side mosfet: 5mm max length lx node (mosfets, rectifier cathode, induc- tor): 15mm max length ideally, surface-mount power components are butted up to one another with their ground terminals almost touching. these high-current grounds are then con - nected to each other with a wide, filled zone of top-layer copper so they do not go through vias. the resulting top-layer subground plane is connected to the normal inner-layer ground plane at the output ground terminals, which ensures that the ic? analog ground is miniatur e, low-v oltage, pr ecision step-down contr oller 18 ______________________________________________________________________________________
sensing at the supply? output terminals without interfer - ence from ir drops and ground noise. other high-cur - rent paths should also be minimized, but focusing primarily on short ground and current-sense connec - tions eliminates about 90% of all pc board layout prob - lems (see the pc board layouts in the max1637 evaluation kit manual for examples). 2) place the ic and signal components. keep the main switching nodes (lx nodes) away from sensitive analog components (current-sense traces and ref capacitor). place the ic and analog components on the opposite side of the board from the power- switching node. important : the ic must be no fur - ther than 10mm from the current-sense resistors. keep the gate-drive traces (dh, dl, and bst) short - er than 20mm and route them away from csh, csl, and ref. place ceramic bypass capacitors close to the ic. the bulk capacitors can be placed further away. 3) use a single-point star ground where the input ground trace, power ground (subground plane), and normal ground plane meet at the supply's output ground terminal. connect both ic ground pins and all ic bypass capacitors to the normal ground plane. max1637 miniatur e, low-v oltage, pr ecision step-down contr oller ______________________________________________________________________________________ 19 max1637 sense resistor high-current path figure 8. kelvin connections for the current-sense resistors max1637 0.1 m f 1 m f irf7401 cmpsh-3 irf7401 1 m f 470pf mbrs130 470 m f low esr tantalum 4.7 m f tantalum 220 m f os-con v bias 10 m h cdhr125-100 20m w 1% 130k 1% 100k 1% output = 2.5v at 4a v cc 20 w gnd cc dl lx dh bst v gg csh csl fb shdn on/off skip sync ref pgnd 3.15v to 5.5v figure 7. 3.15v to 5.5v single-supply application circuit
max1637 miniatur e, low-v oltage, pr ecision step-down contr oller maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 20 ____________________ maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 1998 maxim integrated products printed usa is a registered trademark of maxim integrated products. ___________________ chip infor mation ________________________________________________________ package infor mation transistor count: 2164 qsop.eps

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